|
17. |
Reducing the Energy Dissipation of
the Issue Queue by Exploiting Narrow Immediate Operands
İlknur Cansu Kaynak, Yusuf Onur Koçberber,
Oğuz
Ergin
Journal of
Circuits, Systems and Computers
(JCSC),
to appear. |
|
|
16. |
Energy-Efficient Register Caching
with Compiler Assistance
Timothy Jones, Michael OBoyle, Jaume
Abella, Antonio Gonzalez,
Oğuz
Ergin
ACM
Transactions on Architecture and Code Optimization (TACO),
Vol. 6, Issue 4, Article No. 13, October 2009. |
 |
|
15. |
Exploiting Narrow Values for
Faster Parity Generation
Yusuf Onur Koçberber, Yusuf Osmanlıoğlu,
Oğuz
Ergin
Microelectronics International, Vol 26, No.3,
2009, pp.22-29. |
|
|
14. |
Modifying the Data-Holding
Components of the Microprocessors for Energy Efficiency
Yusuf Osmanlıoğlu, Yusuf Sinan Hanay,
Oğuz
Ergin
Journal of
Circuits, Systems and Computers
(JCSC),
Vol. 18, No.6, October 2009. |
 |
|
13. |
Exploring the Limits of Early
Register Release: Exploiting Compiler Analysis
Timothy Jones, Michael OBoyle, Jaume
Abella, Antonio Gonzalez,
Oğuz
Ergin
ACM
Transactions on Architecture and Code Optimization (TACO),
Vol. 6, Issue 3, Article No. 12, September 2009. |
 |
|
12. |
Reducing Soft Errors through
Operand Width Aware Policies
Oğuz Ergin, Osman
Ünsal, Xavier Vera, Antonio González
IEEE Transactions on Dependable
and Secure Computing (TDSC), Vol. 6, No.3, July/September
2009, pp.217-230. |
 |
|
11. |
Refueling: A Technique to Avoid
Wire Degradation due to Electromigration
Jaume Abella,
Xavier Vera, Osman Ünsal, Oğuz Ergin, Antonio González, James W. Tschanz,
IEEE Micro Magazine, November/December 2008,
pp.37-46. |
 |
|
10. |
Using Tag-Match Comparators for
Detecting Soft Errors
Gülay Yalçın, Oğuz
Ergin
IEEE Computer
Architecture Letters (CAL), Vol. 6, October 2007. |
 |
|
9. |
Impact of Parameter Variations on
Circuits and Microarchitecture
Osman Ünsal, James
W. Tschanz, Keith Bowman, Vivek De, Xavier Vera, Antonio González, Oğuz Ergin
IEEE Micro Magazine, Vol. 26,
No. 6, November/December 2006, pp.30-39. |
 |
|
8. |
Exploiting Narrow Values for Soft
Error Tolerance
Oğuz Ergin, Osman
Ünsal, Xavier Vera, Antonio González
IEEE Computer Architecture Letters
(CAL), Vol. 5, June 2006. |
 |
|
7. |
Early Register Deallocation
Mechanisms Using Checkpointed Register Files
Oğuz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad
Ghose
IEEE Transactions on Computers
(TC),
Vol. 55, No. 9,
September 2006, pp.1153-1166. |
 |
|
6. |
Instruction
Packing: Towards Fast and Energy Efficient Instruction Scheduling
Joseph Sharkey, Dmitry Ponomarev, Kanad
Ghose, Oğuz Ergin
ACM
Transactions on Architecture and Code Optimization (TACO),
Vol 3, No 2, June 2006, pp.156-181. |
 |
|
5. |
Reducing the Power Dissipation of Register Alias Tables
in High-Performance Processors
Gürhan Küçük, Oğuz Ergin, Dmitry
Ponomarev, Kanad Ghose
IEE
Proceedings on Computers and Digital Techniques (PCDT),
Vol. 152, Issue 6, November 2005, pp.739-746. |
 |
|
4. |
Energy-Efficient Comparators for
Superscalar Datapaths
Dmitry Ponomarev,
Gürhan Küçük, Oğuz Ergin, Kanad Ghose
IEEE Transactions on Computers
(TC), Vol. 53, No. 7, July 2004, pp.892-904. |
 |
|
3. |
Isolating Short-Lived Operands for
Energy Reduction
Dmitry Ponomarev,
Gürhan Küçük, Oğuz Ergin, Kanad Ghose
IEEE Transactions on Computers
(TC), Vol. 53, No. 6, June 2004, pp.697-709. |
 |
|
2. |
Complexity-Effective Reorder Buffer Designs for Superscalar Processors
Gürhan Küçük,
Dmitry Ponomarev, Oğuz Ergin, Kanad Ghose
IEEE
Transactions on Computers (TC), Vol. 53, No. 6, June 2004,
pp.653-665. |
 |
|
1. |
Energy-Efficient Issue Queue
Design
Dmitry Ponomarev,
Gürhan Küçük, Oğuz Ergin, Kanad Ghose, Peter Kogge
IEEE Transactions on Very Large
Scale Integration Systems (TVLSI), Vol. 11, No 5, October
2003, pp.789-800. |
 |
|
24. |
Exploiting Inactive Rename Slots
for Detecting Soft Errors
Mehmet Kayaalp, Oğuz
Ergin, Osman Ünsal, Mateo Valero
23th Conference on Architecture of Computing Systems (ARCS10),
Hannover,
Germany, February 2010. |
 |
|
23. |
Complexity-Effective Rename Table
Design for Rapid Speculation Recovery
Görkem Aşılıoğlu, Emine Merve Kaya, Oğuz
Ergin
23th Conference on Architecture of Computing Systems (ARCS10),
Hannover,
Germany, February 2010. |
 |
|
22. |
Reducing Parity Generation Latency
through Input Value Aware Circuits
Yusuf Osmanlıoğlu, Yusuf Onur Koçberber, Oğuz
Ergin
19th ACM Great Lakes Symposium on VLSI (GLSVLSI09), Boston,
Massachusetts, USA, May 2009. |
 |
|
21. |
Exploiting the Dependency Checking
Logic of the Rename Stage for Soft Error Detection
Oğuz
Ergin, Gülay Yalçın, Osman Ünsal, Mateo Valero
1st Workshop on Design for Reliability (DFR09), Paphos, Southern
Cyprus, January 2009. |
 |
|
20. |
Evaluating the Effects of Compiler
Optimizations on AVF
Timothy Jones, Michael OBoyle,
Oğuz
Ergin
12th Annual Workshop on the Interaction between Compilers and Computer
Architecture (INTERACT08), Salt Lake City, Utah, USA,
February 2008. |
 |
|
19. |
Fuse: A Technique to Anticipate
Failures due to Degradation in ALUs
Jaume Abella, Xavier Vera, Osman Ünsal, Oğuz
Ergin, Antonio Gonzalez
13th IEEE International On-Line Testing Symposium (IOLTS07), Crete,
Greece, July 2007. |
 |
|
18. |
Designing Efficient Processors
Using Compiler-Directed Optimisations
Timothy Jones, Michael OBoyle, Jaume
Abella, Antonio Gonzalez,
Oğuz
Ergin
11th Annual Workshop on the Interaction between Compilers and Computer
Architecture (INTERACT07), Phoenix, Arizona, USA, February 2007. |
 |
|
17. |
Exploiting Narrow Values for
Energy Efficiency in the Register Files of Superscalar Microprocessors
Oğuz Ergin
16th International Workshop on Power and
Timing Modeling, Optimization and Simulation (PATMOS'06)
Lecture Notes in Computer Science
(LNCS 4148), Springer-Verlag , September 2006,
pp.477-485. |
 |
|
16. |
Empowering a Helper Cluster through Data Width Aware Instruction
Steering Policies
Osman
Ünsal, Oğuz Ergin, Xavier Vera, Antonio Gonzalez
20th International Parallel and Distributed Processing Symposium
(IPDPS-20), Rhodes, Greece, April 2006. |
 |
|
15. |
Checker Backend for Soft and
Timing Error Detection and Recovery
Xavier Vera, Jaume Abella, Osman
Ünsal, Antonio Gonzalez, Oğuz Ergin
2nd Workshop on System Effects of Logic Soft Errors
(SELSE-2), Urbana-Champaign, Illinois, USA, April 2006. |
 |
|
14. |
Reducing Delay and Power Consumption of the Wakeup Logic through
Instruction Packing and Tag Memoization
Joseph Sharkey, Dmitry Ponomarev, Kanad Ghose, Oğuz Ergin
4th Workshop on Power Aware Computer Systems
(PACS'04)
Lecture Notes in Computer Science (LNCS 3471), Springer-Verlag,
2005, pp.15-29. |
 |
|
13. |
Power-Efficient Wakeup Tag Broadcast
Joseph
Sharkey, Kanad Ghose, Dmitry Ponomarev, Oğuz Ergin
23rd International Conference on Computer Design
(ICCD-23), San Jose, USA, October 2005, pp.654-661. |
 |
|
12. |
Compiler Directed Early Register Release
Timothy Jones, Michael OBoyle, Jaume
Abella, Antonio Gonzalez,
Oğuz
Ergin
14th International Conference on Parallel Architectures and
Compilation Techniques
(PACT-14),
Saint Louis, USA, September 2005, pp.110-119. |
 |
|
11. |
Instruction Packing:
Reducing Power and Delay of the Dynamic Scheduling Logic
Joseph
Sharkey, Dmitry Ponomarev, Kanad Ghose, Oğuz Ergin
International Symposium on Low Power Electronics and Design
(ISLPED'05), San Diego, USA, August 2005, pp.30-35. |
 |
|
10. |
Register Packing: Exploiting
Narrow-Width Operands for Reducing Register File Pressure
Oğuz Ergin, Deniz Balkan, Kanad Ghose, Dmitry
Ponomarev
37th International Symposium on Microarchitecture
(MICRO-37), Portland, USA, December 2004, pp.304-315. |
 |
|
9. |
Increasing Processor Performance
Through Early Register Release
Oğuz Ergin, Deniz Balkan, Dmitry Ponomarev, Kanad
Ghose
22nd International Conference on Computer Design
(ICCD-22), San Jose, USA, October 2004, pp.480-487. |
 |
|
8. |
Defining Wakeup Width for
Efficient Dynamic Scheduling
Aneesh Aggarwal, Manoj Franklin, Oğuz Ergin
22nd International Conference on Computer Design
(ICCD-22), San Jose, USA, October 2004, pp.36-41. |
 |
|
7. |
Selective Writeback: Improving
Processor Performance and Energy Efficiency
Deniz Balkan, Oğuz Ergin, Dmitry Ponomarev, Kanad
Ghose
1st IBM Watson Conference on Interaction between Architecture Circuits
and Compilers (P=AC2),
Yorktown Heights, USA, October 2004, pp.171-180. |
 |
|
6. |
Distributed Reorder Buffer Schemes
for Low Power
Gürhan Küçük, Oğuz Ergin, Dmitry Ponomarev, Kanad
Ghose
21st International Conference on Computer Design
(ICCD-21), San Jose, USA, October 2003, pp.364-370. |
 |
|
5. |
Energy-Efficient Register Renaming
Gürhan Küçük, Oğuz Ergin,
Dmitry Ponomarev, Kanad Ghose
13th International Workshop on Power and
Timing Modeling, Optimization and Simulation (PATMOS'03)
Lecture Notes in Computer Science (LNCS
2799), Springer-Verlag, September 2003, pp.219-228. |
 |
|
4. |
Reducing Datapath Energy Through the Isolation of
Short-Lived Operands
Dmitry Ponomarev,
Gürhan Küçük,
Oğuz Ergin, Kanad Ghose
12th International Conference on Parallel Architectures and Compilation
Techniques
(PACT-12),
New Orleans, USA, September 2003, pp.258-268. |
 |
|
3. |
Power Efficient Comparators for Long Arguments in
Superscalar Processors
Dmitry Ponomarev,
Gürhan Küçük,
Oğuz Ergin, Kanad Ghose
International Symposium on Low Power Electronics and Design
(ISLPED'03), Seoul, Korea, August 2003, pp.378-383. |
 |
|
2. |
Reducing Reorder Buffer Complexity Through Selective Operand Caching
Gürhan Küçük,
Dmitry Ponomarev, Oğuz Ergin, Kanad Ghose
International Symposium on Low Power Electronics and Design
(ISLPED'03),
Seoul, Korea, August 2003, pp.235-240. |
 |
|
1. |
A Circuit-Level Implementation of
Fast, Energy-Efficient CMOS Comparators for High-Performance
Microprocessors
Oğuz Ergin, Kanad Ghose, Gürhan
Küçük, Dmitry Ponomarev
20th International Conference on Computer Design (ICCD-20),
Freiburg, Germany, September 2002, pp.118-121. |
 |